By Bramhananda Marathe,Sandhya Nerale
The objective of this ebook is to supply perception and instinct into the analog and analog-mixed sign approach verification. it's also a trip the writer of this ebook has been via in an effort to take on functional layout and verification demanding situations with country of paintings analog and combined sign designs.
Motivation for authoring this book
The electronic layout verification ability set is particularly assorted than analog layout and verification. normally, the analog block point verification is played through the analog designers, and electronic layout verification is played by means of electronic layout verification engineer. loss of move area ability set makes it demanding to accomplish verification at mixed-signal point. for that reason, both analog dressmaker engineer may still examine complex electronic verification suggestions or electronic layout verification engineer embody analog verification to turn into analog-mixed sign verification engineer. This ebook is written preserving this new pattern in brain, therefore it covers electronic layout basics, electronic layout verification in addition to analog layout basics, and analog functionality verification.
Organization of this book
Keeping the readers of analog verification or electronic layout verification historical past in brain, the booklet has first five chapters all for the basics of the analog layout, electronic layout, and its verification. bankruptcy 6 and bankruptcy 7 makes a speciality of the analog-mixed sign layout verification and behavioral modeling respectively. bankruptcy eight is devoted to the low strength verification options.
Chapter 1: creation to Analog combined sign Verification
This bankruptcy discusses concerning the evolution of the verification methodologies, background of analog-mixed sign designs, purposes, and destiny tendencies.
Chapter 2: Analog layout basics
The function of this bankruptcy is to offer an outline of the analog layout basics for electronic layout historical past engineers. significant concentration is given on analog habit, layout standards and their proposal instead of layout themselves, similar to voltage/current reference, a few of the uncomplicated key analog layout homes akin to achieve, band width, fundamentals of jitter, eye diagram, and so forth.
Chapter three: electronic layout basics
In this bankruptcy, we clarify electronic layout move, combinational and sequential common sense layout basics, layout for testability, innovations of timing, and timing verification.
Chapter four: Analog Verification
This bankruptcy makes a speciality of analog functionality verification and sensible verification lower than the context of combined sign layout hierarchical verification instead of the aspect functionality research of the designs themselves.
Chapter five: electronic layout Verification
This bankruptcy explains the instruments and methodologies which are advanced over the interval which are predicated on predictable caliber and verification potency. The bankruptcy includes the sections at the insurance pushed verification (CDV) method, statement established verification (ABV) method, and evaluate of the CDV utilizing Open Verification method (OVM).
Chapter 6: Analog-Mixed sign Verification
This bankruptcy discusses in regards to the AMS verification levels, selecting the right abstraction of DUT for a given verification problem, AMS verification making plans, testplanning for AMS layout verification, and testbench improvement with re-use in brain.
Chapter 7: Analog Behavioral Modeling
This bankruptcy explains concerning the purposes of analog behavioral versions, modeling technique, basic examples of varied analog behavioral modeling kinds, number of accuracy point of the types in accordance with the verification plan, version verification, and signoff.
Chapter eight: Low strength Verification
The goal of this bankruptcy is to give an explanation for the low energy layout verification demanding situations, key low strength layout components, low strength layout ideas, low energy layout and verification cycle, testplanning for low energy layout verification, energy conscious electronic, and AMS simulations
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Additional resources for Analog-Mixed Signal Verification
Analog-Mixed Signal Verification by Bramhananda Marathe,Sandhya Nerale